MTS Silicon Design Engineer Job Listing at AMD in Bengaluru, KA (Job ID 55779-en-us)

Description

WHAT YOU DO AT AMD CHANGES EVERYTHING

We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world's most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. 

AMD together we advance_

MTS SILICON DESIGN ENGINEER  

THE ROLE: 

We are looking for an adaptive, self-motivated SoC Front-end Design Engineer to join our growing team. As a key contributor, you will be part of a leading team to drive and improve AMD's abilities to deliver the highest quality, industry-leading technologies to market.

THE PERSON:

You have a passion for modern, complex processor architecture, digital design, SOC design, design quality checks and design automation in general. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites/time zones. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems. 

KEY RESPONSIBILITIES:

• Design of Subsystems with integration of AMD and other 3rd party IPs
• Understand clocking, reset and soc top level topology changes to make connectivity as per the topology across IPs
• Collaborate with architects, Verification engineers, and Physical design Engineers to understand the new features to be designed and integrated in SoC
• Understand SOC power domain requirements(power architecture) to write UPFs
• Perform quality checks: Lint, CDC, Low Power checks, Timing constraints, LEC for complex digital designs
• Identify areas for automation and create solutions to improve productivity and quality, continuously improve the automation process by exploring new tools and technologies

PREFERRED EXPERIENCE:

• Minimum 10 years of RTL design, Architecture, SOC implementation experience
• Proficient in Verilog and System Verilog with good understanding of RTL design flows and process
• Detailed understanding of SoC design flows
• Experience with version control system such as perforce
• Verilog lint(Spyglass) and simulation tools (VCS)
• Good understanding and hands-on experience in CDC, RDC, Timing constraints, LEC  and other design quality check concepts
• Knowledge on UPF, Low Power design, IP/SS/SOC Power Management(PM) techniques(Power Gating, Clock Gating) and Low Power static analysis checks will be added advantage
• Good with Scripting languages such as Python, Perl, Makefile, TCL and unix shell
• Automating workflows in a distributed compute environment
• Experience with embedded processors, data fabric architectures (NoC) and standard protocols such APB/AXI Stream and AXI MM
• Ability to work with multi-level functional teams across various geographies
• Strong problem-solving and analytical skills

ACADEMIC CREDENTIALS:

• B.E/B.Tech or M.E/M.Tech degree in ECE/ Electrical Engineering with Digital Systems/VLSI as major.
• #LI-SR5

Benefits offered are described:  AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process.