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Company: AMD
Location: Bengaluru, KA, India
Career Level: Mid-Senior Level
Industries: Technology, Software, IT, Electronics

Description



WHAT YOU DO AT AMD CHANGES EVERYTHING 

At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you'll discover the real differentiator is our culture. We push the limits of innovation to solve the world's most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond.  Together, we advance your career.  



MTS SILICON DESIGN ENGINEER  

 

KEY RESPONSIBILITIES
  • Detailed understanding of existing stimulus generation tools; maintenance and bug fixes for stimulus generation tools.
  • Enhancements to stimulus generation tools, architecture models, and checkers to support new CPU features and AI/ML-driven verification techniques.
  • Integration of AI/ML frameworks into CPU verification infrastructure for intelligent stimulus generation, coverage analysis, and debug automation.
  • Tool Integration and Code Line Integration (codebase includes C++, Verilog, SystemVerilog, Python, Perl, Ruby, etc.).
  • Porting code from previous projects and performing DevOps/MLOps-related tasks for verification workflows.
  • Develop scripts and AI-powered debug utilities to assist CPU Verification Infrastructure, TestPlan, and Debug Teams.
  • Manage regression infrastructure for CPU verification, incorporating ML-based predictive analytics for failure triage and resource optimization.
  • Maintenance and development of stimulus generation tools, architecture models, checkers, and verification components with AI-assisted enhancements.
  • Collaborate with Feature Verification Engineers to understand stimulus requirements and leverage ML techniques for coverage-driven stimulus generation.
  • Provide support to stakeholders and Feature Verification Engineers for stimulus development and AI-enabled verification workflows.
  • Understand CPU architecture and features; basic knowledge of CPU microarchitecture is an added advantage.
  • Exposure to AI/ML concepts such as model training, inference, and integration into verification pipelines.
  • Familiarity with databases (MySQL or similar) and APIs for data orchestration and reporting.
SKILLS AND EXPERIENCE REQUIREMENTS
  • B.E/B.Tech/M.E/M.Tech in Computer Science/Electrical/Electronic Engineering.
  • 8+ years of experience in CPU verification infrastructure development.
  • Strong knowledge of OOP concepts and C++; Assembly language knowledge is a plus.
  • Proficiency in scripting languages (Python is a must; Perl/Ruby preferred).
  • Familiarity with AI/ML frameworks (e.g., PyTorch, TensorFlow) and LLM-based automation concepts is desirable.
  • Basic understanding of Verilog and SystemVerilog.
  • Experience with Linux environments, debugging tools (gdb, perld), and build utilities like make.
  • Exposure to AI-driven verification techniques such as coverage prediction, intelligent stimulus generation, and failure classification.
  • Good understanding of computer architecture and digital systems; CPU architecture and verification knowledge is a strong plus.
  • Strong communication skills (written and oral), proactive, adaptable, and collaborative team player.
  • Well-organized, able to multitask, and deliver with diligence.
GOOD TO HAVE
  • Hands-on experience with LLMs (e.g., GPT, Llama) for automation and verification workflows.
  • Familiarity with AI/ML pipeline optimization, MLOps, and scalable model serving practices.
  • Exposure to containerization (Docker), orchestration (Kubernetes), and CI/CD for verification infrastructure.
  • Experience integrating AI agents into enterprise tools (JIRA, Confluence, Grafana) for workflow automation.
  • Knowledge of vector databases (FAISS, Pinecone) and data visualization for verification analytics.
  • Background in CPU design or verification workflows aligned with AI-driven compute optimization.

 

ACADEMIC CREDENTIALS:  

  • Bachelors or Masters degree in computer engineering/Electrical Engineering 


Benefits offered are described:  AMD benefits at a glance.

 

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process.

 

AMD may use Artificial Intelligence to help screen, assess or select applicants for this position.  AMD's “Responsible AI Policy” is available here.

 

This posting is for an existing vacancy.


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