Senior Silicon Design DFT Engineer Job Listing at AMD in Austin, TX (Job ID 57451-en-us)

Description

WHAT YOU DO AT AMD CHANGES EVERYTHING

We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world's most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. 

AMD together we advance_

THE ROLE:

We are seeking a seasoned SoC DFT Architect with expertise or significant interest in System Architecture. You have had significant success driving architecture, product roadmaps and product requirements. You are meticulous about Power, Performance and Area while driving schedule and managing cost. This senior role will stretch you as you lead architecture teams in new directions, network with our world-class, patent-holding think-tank, and negotiate amongst design teams, marketing, and business unit executives.

THE PERSON:

You have a passion for modern, complex AI graphics processor architecture, digital design, verification and latest packaging technology. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems. You have excellent communication and presentation skills, demonstrated through technical publications, presentations, trainings, executive briefings, etc.  You are highly adept at collaboration among top-thinkers and engineers alike, ready to mentor and guide, and help to elevate the knowledge and skills of the team around you.

KEY RESPONSIBILITIES:

• Design for Test architecture definition, drive development and close implementation and verification for high end Data Center AI Graphics designs across multiple SOC products
• Design and integrate scan control and test compression logic to meet synthesis and physical design requirements, including constraints, timing and power compliance
• Lead testability construction, integration and test validation across multiple fault models and design hierarchy, publish content and results to product teams
• Work cross functionally with IP/Domain architects to identify and assess complex technical issues/risks and develop architectural solutions to achieve product requirements 
• Drive hierarchical test construction development, analysis, DRC and test pattern validation to achieve high test fault coverage and test quality targets
• Work closely with Design teams for Area and Floorplan refinement, Verification Test plan reviews, Timing targets, Emulation plans, Pre-Si bug resolution and Performance/Power Verification sign offs
• Support Post-Si teams for Product Performance, Power and functional issues debug/resolution

 PREFERRED EXPERIENCE:

• ASIC/Custom design and testability experience 
• Strong background and experience with Scan design, Clock architecture, ATPG methodology and commercial EDA tools, including:
  • Scan planning
  • Compression logic generation and insertion
  • STA and Test constraints
  • Test and pattern generation and validation w/wo timing annotation
  • Fault simulation
  • Strong understanding of small delay defect test models for current technology nodes, including Stuck At, Transition, Cell Aware, Bridging, etc.
  • Fault analysis and diagnostic capabilities.
• Strong knowledge of scripting languages, Linux/Unix environment
• Basic knowledge of logical and physical design (PD) processes
• Strong organization, problem solving, and analytical skills are must
• Goal oriented, self-starter able to independently drive tasks to completion
• Excellent communication, management, and presentation skills
• Adept at collaboration among top-thinkers and senior architects with strong interpersonal skills to work across teams in different geographies

 ACADEMIC CREDENTIALS:

• Bachelor's or Master's degree in related discipline preferred

LOCATION:

Austin, Texas

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At AMD, your base pay is one part of your total rewards package.  Your base pay will depend on where your skills, qualifications, experience, and location fit into the hiring range for the position. You may be eligible for incentives based upon your role such as either an annual bonus or sales incentive. Many AMD employees have the opportunity to own shares of AMD stock, as well as a discount when purchasing AMD stock if voluntarily participating in AMD's Employee Stock Purchase Plan. You'll also be eligible for competitive benefits described in more detail here.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process.